In parallel transmission, multiple data differential pairs carry several signals concurrently on several single-ended channels. A clock signal for synchronizing the data at a receiver is also carried on a channel. In serial communications, multiple single-ended signals are serialized by a serializer into a single differential pair with a data rate equal to the summation of the data rates of the single-ended channels that are combined. The serialized data is then driven by a driver logic, or simply driver.
A current mode logic (CML) differential output driver is a type of driver used for high speed transmission lines. The transmission is terminated via a resistor with a resistance that matches the resistance of the transmission line. A CML driver has close to a constant power level over a wide frequency range. Consequently, unlike those of other drivers, the power consumption associated with CML is not frequency dependent. The constant power level makes CML drivers convenient for bandwidth extension. In addition, a CML has a reduced voltage swing. The reduced voltage swing enables the CML to have a faster voltage transition as compared to transitions of other logics.
In order to transmit the data on the high speed data transmission line, the power level of a pre-driver that comprises the serializer may be transformed to the power level of the driver. One approach is to raise the input common mode of the pre-driver to a suitable level for the CML driver. However, raising the signal level of the serializer to the signal level of the CML has several undesirable effects. For example, raising the signal level of the serializer raises the power consumption of the pre-driver, increases output common mode ripples, and increases the spikes on differential signals for skewed inverters.